Joint development of 4nm design infrastructure and DSP IP also recognized

Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it has won four Open Innovation Platform^® (OIP) Partner of the Year awards from TSMC for their core EDA, IP and systems solutions. Cadence achieved recognition for the Joint Development of 4nm Design Infrastructure, 3DFabric^™ Design Solution, Cloud-based Productivity Solution and DSP IP.

Cadence achieved these recognitions based on collaborative work with TSMC:

• 4nm design infrastructure: Cadence worked closely with TSMC to optimize the complete, integrated digital flow for the TSMC N4 process to help customers achieve power, performance and area (PPA) goals and speed time to market. In addition, Cadence delivered a comprehensive custom, analog, EM-IR and mixed-signal design solution, addressing the challenges and complexities for designing custom and analog IP on the TSMC N4 process.
• 3DFabric design solution: Cadence collaborated with TSMC to ensure that the new Cadence^® Integrity^™ 3D-IC platform, the industry’s first unified platform for 3D-IC planning, implementation and system analysis, is enabled for the TSMC 3DFabric^™, a comprehensive family of 3D silicon stacking and advanced packaging technologies. Cadence Tempus^™ Timing Signoff Solution has also been enhanced to support a new stacking static timing analysis (STA) signoff methodology, shortening design turnaround time.
• Cloud-based productivity solution: Cadence delivered the Tempus Timing Signoff Solution with a cloud-ready distributed static timing analysis (DSTA) architecture with giga-scale techniques that let designers quickly optimize the best cloud configuration to balance wall time and cost.
• DSP IP: Cadence worked with TSMC’s Soft IP9000 team to certify Cadence Tensilica^® DSP IP in the TSMC integration flow.

“Over the course of many years, we’ve worked closely with Cadence to ensure our mutual customers have access to the latest technologies needed to innovate and achieve the best possible design results,” said Suk Lee, vice president of the Design Infrastructure Management Division at TSMC. “The TSMC OIP Partner of the Year awards show that our ecosystem partners are committed to enabling customer success, and we look forward to seeing our customers leverage our advanced technologies to stay in front of the competition in their respective markets.”

“By continuing to collaborate with TSMC, we’re enabling mutual customers to deliver designs with confidence and meet design goals by leveraging our newest technologies,” said Dr. Chin-Chi Teng, senior vice president and general manager of the Digital & Signoff Group at Cadence. “These prestigious TSMC awards highlight Cadence’s dedication to enabling SoC design excellence via our Intelligent System Design strategy, and we are committed to continue innovating to ensure our customers have the tools they need to create emerging mobile, automotive and hyperscale computing applications and more.”

About Cadence

Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design^™ strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications, including consumer, hyperscale computing, 5G communications, automotive, mobile, aerospace, industrial and healthcare. For seven years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.

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Cadence won 4 TSMC OIP Partner of the Year Awards for the joint development of the N4 design infrastructure, 3DFabric™ design solution, cloud-based productivity solution and DSP IP.